1 ? fn8182.3 caution: these devices are sensitive to electrosta tic discharge; follow proper ic handling procedures. 1-888-intersil or 1-888-468-3774 | intersil (and design) is a registered trademark of intersil americas inc. xdcp is a trademark of intersil americas inc. copyright intersil americas inc. 2005, 2007. all rights reserved all other trademarks mentioned are the property of their respective owners. x93156 single digitally controlled potentiometer (xdcp?) low noise, low power, 3 wire up/down, 32 taps the intersil x93156 is a three-terminal digitally controlled potentiometer (xdcp). the device consists of a resistor array, wiper switches, a control section, and nonvolatile memory. the wiper position is controlled by an up/down interface. the potentiometer is implemen ted by a resistor array composed of 31 resistive elements and a wiper switching network. the position of the wiper element is controlled by the cs , u/d , and inc inputs. the position of the wiper can be stored in a nonvolatile memory and then be recalled upon a subsequent power-up operation. the device can be used as a th ree-terminal potentiometer or as a two terminal variable resistor in a wide variety of applications including the prog ramming of bias voltages, lcd brightness and contrast control as well as the implementation of ladder networks. features ? solid-state potentiometer ? up/down interface ? 32 wiper tap points - wiper position stored in nonvolatile memory and recalled on power-up ? 31 resistive elements - temperature compensated - maximum resistance tolerance of 25% - terminal voltage, 0 to v cc ? low power cmos -v cc = 2.7v to 5.5v - active current, 200a typ. - standby current, 2a max. ? high reliability - endurance 200,000 data changes per bit - register data retention, 100 years ?r total value = 12.5k , 50k ? package - 8 ld msop - pb-free available (rohs compliant) pinout x93156 (8 ld msop) top view v cc cs inc u/d r h v ss 1 2 3 4 8 7 6 5 x93156 r l rw data sheet november 21, 2007
2 fn8182.3 november 21, 2007 block diagram ordering information part number part marking v cc range (v) r total (k ) temp range (c) package pkg. dwg. # x93156wm8i ago 5 10% 12.5 -40 to +85 8 ld msop m8.118 x93156wm8i-2.7* agr 2.7 to 5.5 12.5 -40 to +85 8 ld msop m8.118 x93156um8i-2.7* agp 2.7 to 5.5 50 -40 to +85 8 ld msop m8.118 x93156wm8iz-2.7* (note) dck 2.7 to 5.5 12.5 -40 to +85 8 ld msop (pb-free) m8.118 x93156um8iz-2.7* (note) akv 2.7 to 5.5 50 -40 to +85 8 ld msop (pb-free) m8.118 x93156wm8iz dcj 5 10% 12.5 -40 to +85 8 ld msop (pb-free) m8.118 *add ?-t1? suffix for tape and reel. please refer to tb347 for details on reel specifications. note: these intersil pb-free plastic packaged products employ special pb-free material sets; molding compounds/die attach materi als and 100% matte tin plate plus anneal - e3 termination finish, which is rohs compliant and compatible with both snpb and pb-free solderin g operations. intersil pb-free products are msl classified at pb-free peak reflow temperatures that meet or exceed the pb-free requirements o f ipc/jedec j std-020. 5-bit up/down counter 5-bit nonvolatile memory store and recall control circuitry one of decoder resistor array r h u/d inc cs transfer gates thirty v cc v ss r l control and memory up/down (u/d ) increment (inc ) device select (cs ) v cc (supply voltage) v ss (ground) r h general detailed 0 1 2 28 29 30 31 two r l 30k r w r w pin descriptions msop symbol brief description 1inc increment (inc ) . the inc input is negative-edge triggered. toggling inc will move the wiper and either increment or decrement the counter in the direction indicated by the logic level on the u/d input. 2u/d up/down (u/d ) . the u/d input controls the direction of the wiper movement and whether the counter is incremented or decremented. 3r h r h . the r h and r l pins of the x93156 are equivalent to the fixed te rminals of a mechanical potentiometer. the minimum voltage is v ss and the maximum is v cc . the terminology of r h and r l references the relative position of the terminal in relation to wiper movement direction selected by the u/d input. 4v ss ground. 5rw r w . the rw pin of the x93156 is the wiper terminal of the potent iometer which is equivalent to the movable terminal of a mechanical potentiometer. 6r l r l . the r h and r l pins of the x93156 are equivalent to the fixed te rminals of a mechanical potentiometer. the minimum voltage is v ss and the maximum is v cc . the terminology of r h and r l references the relative position of the terminal in relation to wiper movement direction selected by the u/d input. 7cs chip select (cs ) . the device is selected when the cs input is low. the current coun ter value is stored in nonvolatile memory when cs is returned high while the inc input is also high. after the store operation is complete, the x93156 will be placed in the low power standby mode until the device is selected once again. 8v cc supply voltage. x93156
3 fn8182.3 november 21, 2007 absolute maximum rati ngs thermal information temperature under bias . . . . . . . . . . . . . . . . . . . . . .-65 c to +135 c storage temperature . . . . . . . . . . . . . . . . . . . . . . . .-65c to +150c voltage on cs , inc , u/d , r h , r l and v cc with respect to v ss . . . . . . . . . . . . . . . . . . . . . . . . . . . -1v to +6.5v maximum resistor current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2ma thermal resistance (typical, note 1) ja (c/w) 8 ld msop. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 190 pb-free reflow profile . . . . . . . . . . . . . . . . . . . . . . . . . .see link below http://www.intersil.com/pbfree/pb-freereflow.asp recommended operating conditions temperature range industrial. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-40c to +85c supply voltage v cc x93156xxx-2.7 . . . . . . . . . . . . . . . . . . . . . . . 2.7v to 5.5v (note 8) x93156xxx . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5v 10% caution: do not operate at or near the maximum ratings listed fo r extended periods of time. exposure to such conditions may adv ersely impact product reliability and result in failures not covered by warranty. note: 1. ja is measured with the component mounted on a high effective ther mal conductivity test board in free air. see tech brief tb379 f or details. potentiometer specifications over recommended operating condi tions unless otherwise stated. symbol parameter test conditions/notes min (note 9) typ max (note 9) unit r tot end to end resistance 9.375 12.5 15.625 k 37.5 50 62.5 k v r r h , r l terminal voltages 0 v cc v power rating (note 7) 1 mw noise ref: 1khz (note 7) -120 dbv r w wiper resistance 1100 i w wiper current (note 6) 0.6 ma resolution 3% absolute linearity (note 2) v h(n)(actual) - v h(n)(expected) (note 4) 1 mi relative linearity (note 3) v h(n + 1) - [v h(n) + mi ] (note 4) 0.5 mi r total temperature coefficient (note 7) 35 ppm/c c h /c l /c w potentiometer capacitances see circuit #2 (note 7) 10/10/25 pf dc electrical specifications over recommended operating condition s unless otherwise specified. symbol parameter test conditions min (note 9) typ (note 5) max (note 9) unit i cc1 v cc active current (increment) cs = v il , u/d = v il or v ih and inc = 0.4v @ max. t cyc v cc = 3v 50 250 a cs = v il , u/d = v il or v ih and inc = 0.4v @ max. t cyc v cc = 5v 200 300 a i cc2 v cc active current (store) (eeprom store) cs = v ih , u/d = v il or v ih and inc = v ih @max. t wr v cc = 3v 600 a cs = v ih , u/d = v il or v ih and inc = v ih @max. t wr v cc = 5v 1400 a i sb standby supply current cs = v cc - 0.3v, u/d and inc = v ss or v cc - 0.3v v cc = 3v 1a cs = v cc - 0.3v, u/d and inc = v ss or v cc - 0.3v v cc = 5v 2a i li cs input leakage current v in = v cc 1 a x93156
4 fn8182.3 november 21, 2007 test circuit #1 circuit #2 spice macro model i li cs input leakage current v cc = 3v, cs = 0 60 100 150 a i li cs input leakage current v cc = 5v, cs = 0 120 200 250 a i li inc , u/d input leakage current v in = v ss to v cc 1 a v ih cs , inc , u/d input high voltage v cc x 0.7 v cc + 0.5 v v il cs , inc , u/d input low voltage -0.5 v cc x 0.1 v c in (notes 7, 8) cs , inc , u/d input capacitance v cc = 3v, v in = v ss , t a = +25c, f = 1mhz 10 pf notes: 2. absolute linearity is utilized to determine ac tual wiper voltage versus expected voltage = (v h(n) (actual)-v h(n) (expected)) = 1 ml maximum. n = 1.. 29 only 3. relative linearity is a measure of the error in step size between taps = v h(n+1) ?[v h(n) + ml] = 0.5 ml, n = 1 .. 29 only. 4. 1 ml = minimum increment = r tot /31. 5. typical values are for t a = +25c and nominal supply voltage. 6. this parameter is periodically sampled and not 100% tested 7. this parameter is not 100% tested. 8. when performing multiple write operations, v cc must not decrease by more than 150mv from it?s initial value. 9. parts are 100% tested at +25c. over-temperature limits established by characterizati on and are not production tested. dc electrical specifications over recommended operating condition s unless otherwise specified. (continued) symbol parameter test conditions min (note 9) typ (note 5) max (note 9) unit endurance and data retention parameter min unit minimum endurance 200,000 data changes per bit data retention 100 years test point v h /r h ac conditions of test input pulse levels 0v to 3v input rise and fall times 10ns input reference levels 1.5v c h c l 10pf 10pf r h r total c w 25pf r l ac electrical specifications over recommended operating conditions unless otherwise specified. symbol parameter min typ max unit t cl cs to inc setup 100 ns t ld inc high to u/d change 100 ns t di u/d to inc setup 100 ns t ll inc low period 1 s t lh inc high period 1 s t lc inc inactive to cs inactive 1 s t cph cs deselect time (no store) 250 ns t cph cs deselect time (store) 10 ms t cyc inc cycle time 2 s x93156
5 fn8182.3 november 21, 2007 ac timing power-up and down requirements there are no restrictions on the power-up or power-down conditions of v cc and the voltages applied to the potentiometer pins provided that v cc is always more positive than or equal to v h and v l , i.e., v cc v h, v l . the v cc ramp rate spec is always in effect. pin descriptions r h and r l the r h and r l pins of the x93156 are equivalent to the fixed terminals of a mechanical potentiometer. the minimum voltage is v ss and the maximum is v cc . the terminology of r h and r l references the relative position of the terminal in relation to wiper movement direction selected by the u/d input. r w the r w pin of the x93156 is the wiper terminal of the potentiometer which is equivalent to the movable terminal of a mechanical potentiometer. up/down (u/d ) the u/d input controls the direct ion of the wiper movement and whether the counter is incremented or decremented. increment (inc ) the inc input is negative-edge triggered. toggling inc will move the wiper and either increment or decrement the counter in the direction indicated by the logic level on the u/d input. chip select (cs ) the device is selected when the cs input is low. the current counter value is stored in nonvolatile memory when cs is returned high while the inc input is also high. after the store operation is complete the x93156 will be placed in the low power standby mode until the device is selected once again. t r , t f (note 7) inc input rise and fall time 500 s t r v cc (note 7) v cc power-up rate 0.2 50 v/ms t wr store cycle 510ms ac electrical specifications over recommended operating conditions unless otherwise specified. (continued) symbol parameter min typ max unit cs inc u/d r w t ci t il t ih t cyc t id t di t iw mi (note 4) t ic t cphs t f t r 10% 90% 90% t cphns x93156
6 fn8182.3 november 21, 2007 principles of operation there are three sections of the x93156: the input control, counter and decode section; the nonvolatile memory; and the resistor array. the input co ntrol section operates just like an up/down counter. the output of this counter is decoded to turn on a single electronic switch connecting a point on the resistor array to the wiper output. under the proper conditions the contents of t he counter can be stored in nonvolatile memory and retained for future use. the resistor array is comprised of 31 individual resistors connected in series. at either end of the array and between each resistor is an electronic switch that tr ansfers the connection at that point to the wiper. the wiper, when at either fixed terminal, acts like its mechanical equivalent and does not move beyond the last position. that is, the counte r does not wrap around when clocked to either extreme. if the wiper is moved several positions, multiple taps are connected to the wiper for t iw (inc to v w change). the 2-terminal resistance value for the device can temporarily change by a significant amount if the wiper is moved several positions. when the device is powered-do wn, the last wiper position stored will be maintained in the nonvolatile memory. when power is restored, the content s of the memory are recalled and the wiper is set to the value last stored. instructions and programming the inc , u/d and cs inputs control the movement of the wiper along the resistor array. with cs set low the device is selected and enabled to respond to the u/d and inc inputs. high to low transitions on inc will increment or decrement (depending on the state of the u/d input) a five bit counter. the output of this counter is decoded to select one of thirty two wiper positions along the resistive array. the value of the counter is st ored in nonvolatile memory whenever cs transitions high while the inc input is also high. in order to avoid an accidental store during power-up, cs must go high with v cc during initial power-up. when left open, the cs pin is internally pulled up to v cc by an internal 30k resistor. the system may select the x93156, move the wiper and deselect the device without havi ng to store the latest wiper position in nonvolatile memory. after the wiper movement is performed as described above and once the new position is reached, the system must keep inc low while taking cs high. the new wiper position will be maintained until changed by the system or until a power-up/down cycle recalled the previously stored data. in order to recall the stored position of the wiper on power-up, the cs pin must be held high. this procedure allows the syst em to always power-up to a preset value stored in nonvolatile memory; then during system operation minor adjust ments could be made. the adjustments might be based on user preference, system parameter changes due to temperature drift, or other system trim requirements. the state of u/d may be changed while cs remains low. this allows the host system to enable the device and then move the wiper up and down until the proper trim is attained. symbol table mode selection cs inc u/d mode l h wiper up l l wiper down h x store wiper position h x x standby current l x no store, return to standby l h wiper up (not recommended) l l wiper down (not recommended) waveform inputs outputs must be steady will be steady may change from low to high will change from low to high may change from high to low will change from high to low don?t care: changes allowed changing: state not known n/a center line is high impedance x93156
7 all intersil u.s. products are manufactured, asse mbled and tested utilizing iso9000 quality systems. intersil corporation?s quality certifications ca n be viewed at www.intersil.com/design/quality intersil products are sold by description only. intersil corpor ation reserves the right to make changes in circuit design, soft ware and/or specifications at any time without notice. accordingly, the reader is cautioned to verify that data sheets are current before placing orders. information furnishe d by intersil is believed to be accurate and reliable. however, no responsibility is assumed by intersil or its subsidiaries for its use; nor for any infringements of paten ts or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of intersil or its subsidiari es. for information regarding intersil corporation and its products, see www.intersil.com fn8182.3 november 21, 2007 x93156 mini small outline pl astic packages (msop) notes: 1. these package dimensions are wi thin allowable dimensions of jedec mo-187ba. 2. dimensioning and tolerancing per ansi y14.5m - 1994. 3. dimension ?d? does not include mold flash, protrusions or gate burrs and are measured at datum plane. mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006 inch) per side. 4. dimension ?e1? does not includ e interlead flash or protrusions and are measured at datum plane. interlead flash and protrusions shall not exceed 0.15mm (0.006 inch) per side. 5. formed leads shall be planar wi th respect to one another within 0.10mm (0.004) at seating plane. 6. ?l? is the length of terminal for soldering to a substrate. 7. ?n? is the number of terminal positions. 8. terminal numbers are shown for reference only. 9. dimension ?b? does not include dambar protrusion. allowable dambar protrusion shall be 0.08mm (0.003 inch) total in excess of ?b? dimension at maximum ma terial condition. minimum space between protrusion and adjacent lead is 0.07mm (0.0027 inch). 10. datums and to be determined at datum plane . 11. controlling dimension: millimeter. converted inch dimen- sions are for reference only. l 0.25 (0.010) l1 r1 r 4x 4x gauge plane seating plane e e1 n 12 top view index area -c- -b- 0.20 (0.008) a b c seating plane 0.20 (0.008) c 0.10 (0.004) c -a- -h- side view b e d a a1 a2 -b- end view 0.20 (0.008) c d e 1 c l c a - h - -a - - b - - h - m8.118 (jedec mo-187aa) 8 lead mini small outline plastic package symbol inches millimeters notes min max min max a 0.037 0.043 0.94 1.10 - a1 0.002 0.006 0.05 0.15 - a2 0.030 0.037 0.75 0.95 - b 0.010 0.014 0.25 0.36 9 c 0.004 0.008 0.09 0.20 - d 0.116 0.120 2.95 3.05 3 e1 0.116 0.120 2.95 3.05 4 e 0.026 bsc 0.65 bsc - e 0.187 0.199 4.75 5.05 - l 0.016 0.028 0.40 0.70 6 l1 0.037 ref 0.95 ref - n8 87 r 0.003 - 0.07 - - r1 0.003 - 0.07 - - 05 o 15 o 5 o 15 o - 0 o 6 o 0 o 6 o - rev. 2 01/03
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